Fueled by innovation at the intersection of biology and technology, we’re developing the next generation of smarter, less invasive, more personalized treatments.

Are you passionate about improving and expanding the possibilities of Cardiovascular? Ready to join a team that’s reimagining how we heal? Our Cardiovascular team develops leading solutions for heart recovery, electrophysiology, and stroke. You will join a proud heritage of continually elevating standards of care for stroke, heart failure and atrial fibrillation (AFib) patients.

Your unique talents will help patients on their journey to wellness. Learn more at https://www.jnj.com/medtech

We are searching for the best talent for a Logic Designer and FPGA Tech Lead role, to join our team located in Yokneam, Israel.

Purpose: We are seeking an experienced Logic Designer and FPGA Technical Lead to join out FPGA team and to provide hands-on technical and architectural leadership for FPGA development in advanced electrophysiology medical systems.

This is a strategic individual-contributor role with direct influence on product architecture, technical decisions, delivery, quality, and safety. Your work will contribute to innovative technologies that improve and protect the health of patients worldwide.

You will combine deep expertise in logic design, FPGA architecture, and RTL development with multidisciplinary collaboration across hardware, software, systems, algorithms, quality, and regulatory functions to deliver robust FPGA solutions in a regulated environment.

Key Responsibilities

• Define and own FPGA architectures and detailed design solutions for complex, real-time medical systems.

• Lead FPGA development activities end to end, from requirements analysis and architecture through RTL implementation, integration, verification, hardware bring-up, and delivery.

• Design, implement, and review high-quality RTL using Verilog and SystemVerilog.

• Translate system requirements, communication interfaces, and signal-processing algorithms into efficient FPGA implementations.

• Provide technical guidance, conduct design and code reviews, establish engineering best practices, and mentor FPGA engineers.

• Drive synthesis, placement and routing, Static Timing Analysis, timing closure, clock-domain crossing analysis, and optimization for performance, power, and resource utilization.

• Lead root-cause analysis and resolution of FPGA, board-level, and system-integration issues using simulation and laboratory debugging tools.

• Collaborate with hardware, software, systems, algorithms, quality, and regulatory teams to ensure seamless integration and compliance with medical-device development processes.

• Maintain clear architecture, interface, verification, implementation, and timing-analysis documentation.

Qualifications and Requirements

• Bachelors degree or higher in Electrical Engineering or Computer Engineering.

• At least six years of hands-on experience in logic design and FPGA/RTL development, including experience leading complex FPGA designs or providing technical mentorship.

• Proven ability to define FPGA architecture and lead development from concept through integration and verification.

• Advanced proficiency in Verilog and SystemVerilog.

• Hands-on experience with synthesis and implementation tools such as Vivado and Quartus.

• Deep understanding of Static Timing Analysis, XDC/SDC constraints, clock-domain crossing, reset design, and low-skew clocking.

• Experience with high-speed interfaces and communication protocols such as PCIe, SerDes, I2C, and SPI.

• Knowledge of signal-processing algorithms and their implementation in FPGA.

• Hands-on hardware bring-up and debugging experience using oscilloscopes, logic analyzers, protocol analyzers, JTAG, and BERT.

• Ability to read electrical schematics and a basic understanding of signal integrity, power integrity, power distribution, and thermal requirements.

• Strong technical leadership, communication, problem-solving, and cross-functional collaboration skills.

• Experience in a regulated medical-device environment is an advantage.

• Familiarity with Artix-7 and Kintex UltraScale+ devices is an advantage.