<h2>At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.</h2>The Product Engineer (PE) bridges the gap between customers, R&amp;D, and field Application Engineers (AEs). In this highly creative and innovative role, they are responsible for ensuring that existing flows and apps meet the ongoing needs of our customers, while also developing flows and requirements to solve new verification challenges. The PE will collaborate closely with both customers and R&amp;D to drive specification, implementation, and evaluation/benchmarking of the new solutions. In addition, the PE will be responsible for the roll-out of new features to AEs and customers, and in some cases will play a pivotal role performing hands-on work (remote or onsite) to enable key customers to achieve their verification goals with very high performance and efficiency. This position gives abundant exposure to working on and influencing the latest design styles and verification methodologies used by large semiconductor companies. It may occasionally involve worldwide travel to attend meetings or conferences or to assist with product demonstrations, evaluations, and competitive benchmarks at customer sites. Desired Technical Skills and Experience <ul><li>The candidate should possess a BE/B.Tech engineering or higher degree in CS or EE with a minimum 10 years of industry experience. </li><li>Minimum of 4 years hands-on experience in applying formal property verification technologies and methodologies.</li><li>Hands-on design experience using Verilog, System Verilog is a must. </li><li>Hands-on experience with any of the common scripting languages, such as TCL, Perl, Python, etc., is a must. </li><li>Desire/Ability to learn complex arithmetic algorithms is a must.</li><li>Hands-on Jasper experience is a plus.</li><li>Knowledge of arithmetic algorithms (various multiplier implementations like Booth, compression schemes, dividers like SRT, floating point operations) is a plus.</li><li>Working knowledge of C++ is a plus.</li><li>Hands-on experience with formal software verification is a plus.</li><li>Hands-on experience using HDL simulator is a plus. </li><li>Knowledge of sign-off methodologies using code &amp; functional coverage is a plus. </li></ul>Desired Soft Skills and Experience <ul><li>Highly organized, self-motivated individual with demonstrated ability to multitask </li><li>Very good communication skills and a strong desire to work in a global environment with customers, developers, marketing, and sales. </li><li>Passionate about adopting and promoting new technologies and making customers successful. </li><li>Successful in building and delivering training content on rolling out new products/methodologies.</li><li>Highly technical &amp; hands on engineer with an ability to partner with key customers and provide expert support to field application engineers. </li></ul><h2>We’re doing work that matters. Help us solve what others can’t.</h2>

Cadence Design Systems

Principal Product Engineer

Cadence Design Systems